Arbitrary Sampling Rate Converter in VHDL
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Project: Arbitrary Sampling Rate Converter in VHDL | |
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State | Active |
Members | Danny Witberg |
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Description | ASRC's: What, how, why? |
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This project describes the theory of an Arbitrary Sampling Rate Converter, and a practical lightweight implementation in VHDL. ASRC's are ofthen used in digital audio, to adapt an input to an output which differ in sampling rates to each other.